Self-Consistent Thermal-Aware Hierarchical Power/Ground Networks Optimization

With the growing power density and heat-dissipation cost of modern VLSI designs, thermal and power integrity quickly become serious concerns. Although the impacts of thermal effects on transistor and interconnects performance are relatively well-known, the interactions between power-delivery and thermal are not clear. As a result, power-delivery design without thermal consideration may cause soft-error, reliability degradation, and even premature chip failures. In this paper, we propose self-consistent thermal-aware hierarchical power-delivery optimization. By simultaneously considering thermal and power integrity, we are able to achieve high power supply quality and thermal reliability. Furthermore, to deal with the large scale power-delivery optimization issue, we propose hierarchical optimization which effectively reduce the runtime and memory consumptions. Experimental results demonstrate the efficiency and optimality of our approach to produce high quality self-consistent power-delivery solution for chip-level optimization tasks.